Part Number Hot Search : 
4N60B ATMEGA 25ETTT LXT332PE PTN3331 LXT332PE EN6135B 6043441
Product Description
Full Text Search
 

To Download LV1116N08 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  12308 ti im b8-8523,8524 / n2206 / 21805 jk no.8262-1/18 lv1116n/nv overview the lv1116n/nv are sound processor ics developed for use in tv sets. they incorporate the surround processing functions including (aviss), pseudo stereo function, (l+r) output, and the major functional blocks of an electronic volume control ic. features ? input function sws (stereo inputs [l, r]). ? line out pin (through output). ? input gain control ( ? 6db, ? 4db, 0db, 4db, 6db: 5 positions). ? aviss (on/off/4-stage level control). ? tone control (bass: 20db, treble: 18db [in 2db steps]). ? volume control (0db to ? 14db: 1db steps/ ? 14db to ? 80db: 2db steps/ ? = ? 82db). ? balance control. ? through mode/mute mode. ? pseudo stereo function (on/off/mono). ? l+r output with lpf (mute + 7-stage level control: 8 positions). ? i 2 c bus control. * initial gain of l+r amp can be controlled by the resistance value of external resistor. specifications maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v cc max 10.5 v allowable power dissipation 1 pd max1 ta 70 c *, dip 700 mw allowable power dissipation 2 pd max2 ta 70 c *, ssop 550 mw operating temperature topr -25 to +70 c storage temperature tstg -40 to +125 c note *: mounted on a specified board: 114.3mm 76.1mm 1.6mm, glass epoxy board ordering number : en8262a bi-cmos ic surround processor ics for electronic volume control specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use.
lv1116n/1116nv no.8262-2/18 operating condtions at ta = 25 c parameter symbol conditions ratings unit recommended supply voltage v cc 9.0 v operating supply voltage 1 v cc opg1 dip 5.0 to 10.0 v operating supply voltage 2 v cc opg2 ssop 5.0 to 9.0 v control data ?h? level voltage v ih 2.0 to 5.5 v ?l? level voltage v il 0.0 to 1.0 v pulse width t w 1.0 s hold time thold 1.0 s operating frequency fopg 500 khz electrical characteristics at ta = 25 c, v cc = 9.0v, fin = 1khz, v in = 300mvrms = 0db, r l = 10k (input=l/r-a, output=l/r-vrout) ratings parameter symbol conditions min typ max unit quiescent current i cco 48 ma total through (total through mode, volume control: 0db) voltage gain vg t -1.6 -0.6 +0.6 db maximum output voltage vo t thd=1% 2.0 2.6 vrms total harmonic distortion thd t din audio 0.03 0.1 % output noise voltage vno t din audio -99 -85 dbv cross talk ct t din audio 85 95 db matrix through (matrix mode, input ga in: 0db, volume control: 0db) voltage gain vg f -1.7 -0.7 +0.7 db maximum output voltage vo m thd=1% 1.5 2.0 vrms total harmonic distortion thd m din audio 0.04 0.1 % output noise voltage vno m din audio -95 -85 dbv cross talk ct m din audio 85 93 db mono mode (mono mode, input ga in: 0db, volume control: 0db) maximum output voltage vo s thd=1% 1.5 2.0 vrms total harmonic distortion thd s din audio 0.04 0.5 % output noise voltage vno s din audio -95 -85 dbv surround (surround mode-a, input gain: 0db, volume control: 0db) maximum output voltage vo s thd=1% 1.5 2.0 vrms total harmonic distortion thd s din audio 0.2 0.5 % output noise voltage vno s din audio -92 -85 dbv pseudo stereo (pseudo stereo mode, input gain: 0db, volume control: 0db) maximum output voltage vo s thd=1% 1.5 2.0 vrms total harmonic distortion thd s din audio 0.07 0.5 % output noise voltage vno s din audio -92 -85 dbv bass band eq (matrix through mode, input gain: 0db, volume control: 0db) control range 1 geq b max. boost/cut, dip 18 20 22 db control range 2 geq b max. boost/cut, ssop 17 20 23 db step resolution estep b 1.0 2.0 3.0 db treble band eq (matrix through mode, input gain: 0db, volume control: 0db) control range 1 geq t max. boost/cut, dip 16 18 20 db control range 2 geq t max. boost/cut, ssop 15 18 21 db step resolution estep t 1.0 2.0 3.0 db continued on next page.
lv1116n/1116nv no.8262-3/18 continued from preceding page. ratings parameter symbol conditions min typ max unit l+r output (output=l+r-out, step=0db, l+r_step=step4) gain vg f -2.3 -1.3 -0.3 db maximum output voltage vof thd=1% 2.0 2.5 vrms total harmonic distortion thd f din audio 0.03 0.1 % output noise voltage vno f din audio -99 -85 dbv note: the output wave form becomes big depending on the surround or tone control setting. please make sure the output waveform is not distorted. if the waveform is distor ted, reduce the gain setting of surround, tone control, or input signal level. package dimensions unit : mm (typ) 3170a [lv1116n] package dimensions unit : mm (typ) 3247a [lv1116nv] sanyo : ssop36(275mil) 1 36 18 19 0.8 15.0 0.5 7.6 0.2 0.3 (0.7) 5.6 (1.5) 1.7max 0.1 sanyo : dip36s(400mil) 3.95max (3.25) 0.51min 3.0 32.4 8.6 0.95 0.25 (1.1) 1.78 0.48 10.16 118 36 19
lv1116n/1116nv no.8262-4/18 block diagram
lv1116n/1116nv no.8262-5/18 i 2 c bus control signal figure1 i 2 c bus control signal timing chart i 2 c bus register 1) the explanation of i 2 c bus i 2 c bus (inter ic bus) is the bus system which the philips company developed. it does controls such as the start, the stop by two co ntrol signals of sda (serial data) and scl (serial clock). the output of each signal is open drain and forms out of wired or. s: start condition p: stop condition ack: acknowledge data is transmitted in the msb first. 1 unit is composed of 8 bits and ack is put back from the slave to confirm. slave ic reads data with rising edge of scl. master ic changes data by falling edge in scl. 2) the control register table1 slave address msb lsb 1 1 1 0 1 1 1 0 note; lv1116n/nv are reception exclusive use. it depends and it uses lsb by the "0" fixation. table2 i 2 c bus transmission sub address data function binary hex d7 d6 d5 d4 d3 d2 d1 d0 input control/gain control 0000 0001 01 0 0 gain input volume control 0000 0010 02 channel volume output/surround/mode control 0000 0011 03 l+r out gain surround mode tone control [bass] 0000 0100 04 0 0 0 bass tone control [treble] 0000 0101 05 0 0 0 treble table3 input selection sub address data a7 a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 mute 0 0 * * * 0 0 0 in a 0 0 * * * 0 0 1 in b 0 0 * * * 0 1 0 in c 0 0 0 0 0 0 0 1 0 0 * * * 0 1 1 table4 gain control sub address data a7 a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 -6db 0 0 0 1 1 * * * -4db 0 0 0 1 0 * * * 0db 0 0 0 0 0 * * * +4db 0 0 1 1 0 * * * +6db 0 0 0 0 0 0 0 1 0 0 1 1 1 * * * tlow tsu:sta thd:sta thigh thd:dat tr tf tsu:dat tsu:sto tbuf scl sda
lv1116n/1116nv no.8262-6/18 table5 mode control sub address data a7 a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 total * * * * * * 0 0 matrix * * * * * * 0 1 mono * * * * * * 1 0 pseudo 0 0 0 0 0 0 1 1 * * * * * * 1 1 table6 surround control sub address data a7 a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 off * * * 0 0 0 * * mode-c * * * 0 1 1 * * mode-b * * * 0 1 0 * * mode-a * * * 0 0 1 * * mode-f 1 1 1 mode-e 1 1 0 mode-d 0 0 0 0 0 0 1 1 * * * 1 0 1 * * note; at the time of forced mono mode, there is not surround effect. note; output gain = step1 < step7 table7 l+r output gain control sub address data a7 a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 mute 0 0 0 * * * * * step1 0 0 1 * * * * * step2 0 1 0 * * * * * step3 0 1 1 * * * * * step4 1 0 0 * * * * * step5 1 0 1 * * * * * step6 1 1 0 * * * * * step7 0 0 0 0 0 0 1 1 1 1 1 * * * * * note; output gain = step1 < step7 table8 tone control [bass control] sub address data a7 a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 +20db 0 0 0 0 1 0 1 0 +18db 0 0 0 0 1 0 0 1 +16db 0 0 0 0 1 0 0 0 +14db 0 0 0 0 0 1 1 1 +12db 0 0 0 0 0 1 1 0 +10db 0 0 0 0 0 1 0 1 +8db 0 0 0 0 0 1 0 0 +6db 0 0 0 0 0 0 1 1 +4db 0 0 0 0 0 0 1 0 +2db 0 0 0 0 0 0 0 1 0db 0 0 0 0 0 0 0 0 -2db 0 0 0 1 0 0 0 1 -4db 0 0 0 1 0 0 1 0 -6db 0 0 0 1 0 0 1 1 -8db 0 0 0 1 0 1 0 0 -10db 0 0 0 1 0 1 0 1 -12db 0 0 0 1 0 1 1 0 -14db 0 0 0 1 0 1 1 1 -16db 0 0 0 1 1 0 0 0 -18db 0 0 0 1 1 0 0 1 -20db 0 0 0 0 0 1 0 0 0 0 0 1 1 0 1 0
lv1116n/1116nv no.8262-7/18 table9 tone control [treble control] sub address data a7 a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 +18db 0 0 0 0 1 0 0 1 +16db 0 0 0 0 1 0 0 0 +14db 0 0 0 0 0 1 1 1 +12db 0 0 0 0 0 1 1 0 +10db 0 0 0 0 0 1 0 1 +8db 0 0 0 0 0 1 0 0 +6db 0 0 0 0 0 0 1 1 +4db 0 0 0 0 0 0 1 0 +2db 0 0 0 0 0 0 0 1 0db 0 0 0 0 0 0 0 0 -2db 0 0 0 1 0 0 0 1 -4db 0 0 0 1 0 0 1 0 -6db 0 0 0 1 0 0 1 1 -8db 0 0 0 1 0 1 0 0 -10db 0 0 0 1 0 1 0 1 -12db 0 0 0 1 0 1 1 0 -14db 0 0 0 1 0 1 1 1 -16db 0 0 0 1 1 0 0 0 -18db 0 0 0 0 0 1 0 1 0 0 0 1 1 0 0 1 table10 volume control sub address data a7 a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 0db * * 0 0 0 0 0 0 -1db * * 0 0 0 0 0 1 -2db * * 0 0 0 0 1 0 -3db * * 0 0 0 0 1 1 -4db * * 0 0 0 1 0 0 -5db * * 0 0 0 1 0 1 -6db * * 0 0 0 1 1 0 -7db * * 0 0 0 1 1 1 -8db * * 0 0 1 0 0 0 -9db * * 0 0 1 0 0 1 -10db * * 0 0 1 0 1 0 -11db * * 0 0 1 0 1 1 -12db * * 0 0 1 1 0 0 -13db * * 0 0 1 1 0 1 -14db * * 0 0 1 1 1 0 -16db * * 0 0 1 1 1 1 -18db * * 0 1 0 0 0 0 -20db * * 0 1 0 0 0 1 -22db * * 0 1 0 0 1 0 -24db * * 0 1 0 0 1 1 -26db * * 0 1 0 1 0 0 -28db * * 0 1 0 1 0 1 -30db * * 0 1 0 1 1 0 -32db * * 0 1 0 1 1 1 -34db * * 0 1 1 0 0 0 -36db * * 0 1 1 0 0 1 -38db * * 0 1 1 0 1 0 -40db * * 0 1 1 0 1 1 -42db * * 0 1 1 1 0 0 -44db * * 0 1 1 1 0 1 -46db * * 0 1 1 1 1 0 -48db * * 0 1 1 1 1 1 -50db * * 1 0 0 0 0 0 -52db 0 0 0 0 0 0 1 0 * * 1 0 0 0 0 1 continued on next page.
lv1116n/1116nv no.8262-8/18 continued from preceding page. sub address data a7 a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 -54db * * 1 0 0 0 1 0 -56db * * 1 0 0 0 1 1 -58db * * 1 0 0 1 0 0 -60db * * 1 0 0 1 0 1 -62db * * 1 0 0 1 1 0 -64db * * 1 0 0 1 1 1 -66db * * 1 0 1 0 0 0 -68db * * 1 0 1 0 0 1 -70db * * 1 0 1 0 1 0 -72db * * 1 0 1 0 1 1 -74db * * 1 0 1 1 0 0 -76db * * 1 0 1 1 0 1 -78db * * 1 0 1 1 1 0 -80db * * 1 0 1 1 1 1 - db 0 0 0 0 0 0 1 0 * * 1 1 0 0 0 0 table11 volume channel control sub address data a7 a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 l-ch 0 1 * * * * * * r-ch 1 0 * * * * * * l/r 0 0 0 0 0 0 1 0 1 1 * * * * * * it is the flow chart of theprogram which controls lv1116n/nv. ex.1: it is the order, sets an initial and input port control. note: the data to transmit is ex.. start start_sub_address (01 h ) transmits sub_address1_data (01 h ) transmits sub_address2_data (d6 h ) transmits sub_address3_data (01 h ) transmits sub_address4_data (03 h ) transmits sub_address5_data (13 h ) transmits end input = ch-a gain = 0db lch = rch = -30db matrix mode surround off l+r mute bass band +6db treble band -6db when doing an initial setting slave_address (ee h ) transmits
lv1116n/1116nv no.8262-9/18 ex.2: it is the order, sets a volume control data, when lch and rch are same data. note 1: the data to transmit is ex.. note 2: this control doesn?t change, input control and input gain control. ex.3: it is the order, sets a volume control data, when lch and rch are other data. note 1: the data to transmit is ex.. note 2: this control doesn?t change, input control and input gain control. start slave_address (ee h ) transmits start_sub_address (02 h ) transmits sub_address2_data (d6 h ) transmits sub_address3_data (01 h ) transmits sub_address4_data (03 h ) transmits sub_address5_data (13 h ) transmits end lch = rch = -30db matrix mode surround off l+r mute bass band +6db treble band -6db when doing a volume setting (lch = rch) start start_sub_address (02 h ) transmits sub_address2_data (55 h ) transmits sub_address3_data (01 h ) transmits sub_address4_data (03 h ) transmits sub_address5_data (13 h ) transmits end lch = -28db matrix mode surround off l+r mute bass band +6db treble band -6db when doing a volume setting (lch = -28db, rch = -32db) slave_address (ee h ) transmits start_sub_address (02 h ) transmits sub_address2_data (97 h ) transmits sub_address3_data (01 h ) transmits sub_address4_data (03 h ) transmits sub_address5_data (13 h ) transmits rch = -32db bass band +6db treble band -6db slave_address (ee h ) transmits matrix mode surround off l+r mute
lv1116n/1116nv no.8262-10/18 ex.4: it is the order, sets a mode control, surround and output control data. note 1: the data to transmit is ex.. note 2: this control doesn?t change, input control, input gain control and volume control. ex.5: it is the order, sets a mode control, bass band control data. note 1: the data to transmit is ex.. note 2: this control doesn?t change, input, gain, volume, and output mode control. ex.6: it is the order, sets a mode control, treble band control data. note 1: the data to transmit is ex.. note 2: this control doesn?t change, except this treble band data. start slave_address (ee h ) transmits start_sub_address (03 h ) transmits sub_address3_data (01 h ) transmits sub_address4_data (03 h ) transmits sub_address5_data (13 h ) transmits end matrix mode surround off l+r mute bass band +6db treble band -6db when doing a mode setting start slave_address (ee h ) transmits start_sub_address (04 h ) transmits sub_address4_data (03 h ) transmits sub_address5_data (13 h ) transmits end bass band +6db treble band -6db when doing a bass band setting start slave_address (ee h ) transmits start_sub_address (05 h ) transmits sub_address5_data (13 h ) transmits end treble band -6db when doing a treble band setting
lv1116n/1116nv no.8262-11/18 sample application circuit rch-b 5 15 14 13 12 11 10 9 8 7 6 r-tc1 lpfc st-1 r-bc1 3 2 4 rch-a 1 gnd 18 17 16 r-bc2 + r-vrout r-out l+r vref v dd v cc rch-c r line out r-dc 1 f l-bc1 l-bc2 32 22 23 24 25 26 27 28 29 30 31 l-out r-tc1 hpfc st-2 33 34 lch-a lch-b 36 agnd 19 20 21 35 + l-vrout data clk v ss l+r lpf lch-c l line out l-dc 1 f lv1116n/1116nv
lv1116n/1116nv no.8262-12/18 pin functions pin no function voltage remarks internal equivalent circuit 1 gnd 0 2 input-a(r) 35 input-a(l) 3 input-b(r) 34 input-b(l) 4 input-c(r) 33 input-c(l) vref input impedance ri=50k 5 line-out(r) 32 line-out(l) vref function sw output ro=50k 6 dc cut(r) 31 dc cut(l) vref dc offset cancellation capacitor connection pin 7 st-1 30 st-2 vref pseudo stereo phase shift capacitor connection pin 8 aviss lpf vref capacitor connection pin for surround low pass filter 9 treble(r) 28 treble(l) vref capacitor connection pin for configuring treble filter 10 bass-1(r) 27 bass-1(l) 11 bass-2(r) 26 bass-2(l) vref bass band filter configuration capacitor and resistor connection pins 12 out(r) 25 out(l) vref output impedance ro=50k continued on next page. 6 31 7 30 8 9 28 10 27 11 26 12 25
lv1116n/1116nv no.8262-13/18 continued from preceding page. pin no function voltage remarks internal equivalent circuit 13 evr-in(r) 24 evr-in(l) vref input impedance ri=50k 14 evr-out(r) 23 evr-out(l) vref output impedance ro=50k 15 l+r out vref output impedance ro=10k 16 vref 0.5v cc reference voltage 17 v cc v cc 18 v dd v dd 19 i 2 c-data 20 i 2 c-clk i 2 c control data input 21 v ss 0 22 l+r lpf vref internal resistor 29 aviss hpf vref 36 analog gnd vref 13 24 14 23 15 16 v cc 22 29 36
lv1116n/1116nv no.8262-14/18 treble / bass band block e quivalent circuit diagram l+r block equivalent circuit diagram + - total=51.7k sw2 sw1 sw3 sw4 r1=10.633k r2=8.446k r3=6.709k r4=5.329k r5=4.233k 2db 4db 6db 8db 10db 12db 14db 16db 18db 2db 4db 6db 8db 10db 12db 14db 16db 18db 20db r6=3.363k r7=2.671k r8=2.122k r9=1.665k r10=6.510k 0db + - total=66.7k sw2 sw1 sw3 sw4 r1=15.220k r2=12.089k r3=9.603k r4=7.628k r5=6.059k r6=4.813k r7=3.823k r8=3.037k r9=2.412k r10=1.916k 0db r11=100 r12=100 l-tc1 l-bc2 l-bc1 from l-input block to l-out block during boost, sw1 and sw3 are on, during cut, sw2 and sw4 are on, when 0db, 0dbsw and sw2 and sw3 are on. same for right channel + - mute r1=50k r2=50k step2 step3 step4 step5 step6 step7 + - total=50k r5=10.284k r4=10k r6=8.169k r7=6.489k r8=5.154k r9=4.094k r10=3.252k r3=50k step1 r11=12.559k agnd l+r_lpf from l-vrout + - from r-vrout l+r ilv00257
lv1116n/1116nv no.8262-15/18 tone circuit constant calculation examples treble band circuit: the shelving characteristics can be obtained for the treble band. the equivalent circuit and calculation formula during boost are indicated below. ? calculation example 1 specification set frequency: f = 10000hz gain during maximum boost: g +18db = 17.5db let us use r1 = 6.51k ? and r2 = 45.19k the above constants are inse rted in the following formula g = 20 log 10 1+ c = = 6500 (pf) bass band circuit: the equivalent circuit and the formula for calculating the external rc with a mean frequency of 100hz are shown below. ? calculation example 1 specification mean frequency: f0 = 100hz gain during maximum boost: g +20db = 20db let us use r1 = 0k and r2 = 66.7k , and c1 = c2 = c. we obtain r3 from g = 20db r2 g = 20 log 10 1+ 2r3 r3 = = 3.6k we obtain c from mean frequency f0 = 100hz f0 = c = = 0.1 f we obtain q q = 2.15 note item when using (1) when turning on the power, the setting inside is unsettled. before setting control data, it does a mute. (2) to prevent the digital noise of the high frequency influence a terminal. (scl, sda) it can be protected by a signal line in the ground pattern or by the shielding cable. (3) to prevent the noise in changing a mode, please set the mute on. 1 r2 2 10 g/20 -1 2 f -r1 2 1 45190 2 7.50 - 1 2 10000 - 6510 2 r2 r1 2 +(1/ c) 2 + - r2 r1 c r2 2 (10 g+20db/20 - 1) 66700 2 (10 - 1) 1 2 (r3r2c1c2) 1 2 f0 r3r2 1 2 100 66700 3600 1 r3r2 r3r2 2r3 + - r3 r1 c2 c1 r2
lv1116n/1116nv no.8262-16/18 bass band frequency characteristics -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 100 1000 10000 100000 frequency (hz) gain (dbv) treble band frequency characteristics -45 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 100 1000 10000 100000 frequency (hz) gain (dbv) volume control step characteristics -90 -80 -70 -60 -50 -40 -30 -20 -10 0 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 step setting (db) volume attenuation (db) surround mode frequency characteristics -25 -20 -15 -10 -5 10 100 1000 10000 100000 frequency (hz) gain (dbv) l+r frequency characteristics -60 -50 -40 -30 -20 -10 0 10 10 100 1000 10000 100000 frequency (hz) gain (dbv) gain - frequency -10 -8 -6 -4 -2 0 2 4 6 8 10 -6 -4 -2 0 2 4 6 gain step (db) gain attenetion (db) vcc = 9.0v vin = - 10dbv input = l/r ch- a output = l/r out vcc - vomax characteristics (1) 0.1 1.0 10.0 100.0 5678910 vcc (v) vomax (dbv) total ma t r ix vcc = 9.0v vin = 0dbv input = vrin output = vrout vcc = 9.0v vin = -20dbv c = 2700pf input = l/r ch-a output = l/r out vcc = 9.0v vin = - 20dbv c = 0.1uf r = 3.6k ? input = l/r ch-a output = l/r out vcc = 9.0v vin = - 20dbv input = l/r ch- a output = l/r out vcc = 9.0v vin = 0dbv input = vrin output = vrout thd = 1% input = l/r ch-a output = l/r out pseud lch vs rch phese shif t vs frequency characteristics 0 90 180 10 100 1000 10000 100000 frequency (hz) phase shift (deg ) vcc = 9.0v vin = -20dbv input = l/r ch- a output = l/r out
lv1116n/1116nv no.8262-17/18 thd - vin characteristics 0.001 0.01 0.1 1 -40 -30 -20 -10 0 vin (dbv) total harmonic distotion (%) total matrix mono psudo vcc - vref 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 vcc (v) vref (v) v cc - a gnd 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 vcc (v) agnd (v) vcc - vdd 2.5 2.7 2.9 3.1 3.3 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 vcc (v) vdd (v) v cc - icco 20.0 25.0 30.0 35.0 40.0 45.0 50.0 55.0 60.0 65.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 vcc (v) icco (ma) thd - frequency characteistics 0.01 0.1 1 100 1000 10000 100000 frequency (hz) total harmonic distotion (%) total matrix m ono psudo sur round vcc= 9.0v vin= - 10dbv thd - supply voltage characteristics 0.01 0.1 1 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 supply voltage (v) total harmonic distotion (%) total matrix mono psudo sur r ound vin= -10dbv fin= 1khz thd - vin characteristics (surround) 0.001 0.01 0.1 1 -40 -30 -20 -10 0 vin (dbv) total harmonic distotion (%) vcc=9.0v fin= 1khz m ode_a vcc=9.0v fin= 1khz
lv1116n/1116nv no.8262-18/18 ps this catalog provides information as of january, 2008. specifications and information herein are subject to change without notice. sanyo semiconductor co.,ltd. assumes no responsibil ity for equipment failures that result from using products at values that exceed, even momentarily, rated v alues (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qua lity high-reliability products, however, any and all semiconductor products fail or malfunction with some probab ility. it is possible that these probabilistic failures or malfunction could give rise to accident s or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause damage to other property. when designing equipment, adopt safety measures so that these kinds of accidents or events cannot occur. such measures include but are not limited to protective circuits and error prevention circuits for safe design, redundant design, and structural design. upon using the technical information or products described herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable for any claim or suits with regard to a third party's intellectual property rights which has resulted from the us e of the technical information and products mentioned above. information (including circuit diagrams and circuit par ameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained he rein are subject to change without notice due to product/technology improvement, etc. when designing equip ment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor co.,ltd. products described or contained herein are controlled under any of applicable local export control l aws and regulations, such products may require the export license from the authorities concerned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd.


▲Up To Search▲   

 
Price & Availability of LV1116N08

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X